MayTrig
Envelopes & ModmaytrigLight CPU
Probability gate for a clock — passes each trigger through, or drops it.
What it does
Probabilistic trigger gate — makes a steady clock generative.
Wraps daisysp::Maytrig, which is a single rand() compare with no state and no init. A file-scope prev_trig snapshot detects the rising edge at Clock, and only that edge draws the coin flip; a surviving trigger is emitted as a one-sample 1.0 pulse. Feeding the class every sample instead would gate on roughly Chance of all 48,000 samples a second, which is a level, not a trigger.
Parameters
-
Chance
probThe odds each incoming clock trigger survives. 1.0 passes every one (the tile becomes a wire), 0.0 drops every one, 0.5 is a coin flip per beat. This is the value used when the Chance port is unwired — wire a knob or an LFO into it to make the density itself move.
Passes an incoming Clock trigger through with probability Chance, and swallows it otherwise. Wire Metro (or a button/gate) into Clock — with Clock unwired nothing ever fires. Chance is per-sample (modulatable); the decision is taken once per clock edge, not once per sample.
Ports
In
-
Clock
clock -
Chance
prob
Out
-
Trig
trig
Audio Control
Inputs
- Clock
- Rising edge offers a trigger for the flip — wire a Metro, button, pad, or gate.
- Chance
- Probability that trigger survives (0 = never, 1 = always).
Outputs
- Trig
- One-sample pulse on each surviving clock edge.
Rules and gotchas
- With Clock unwired the tile never fires — it is a gate on someone else's clock, not a source.
- The coin is flipped once per rising edge, not once per sample: a held gate produces exactly one decision.
- Chance is clamped to 0..1 at emit, so a wired port that overshoots reads as "always" or "never" rather than as undefined odds.
- Output is a one-sample trigger, the same shape Metro emits — feed it to AD Envelope, a drum voice, or Sample & Hold.